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<div class="header">
  <div class="summary">
<a href="#groups">Modules</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle"><div class="title">hardware_interp<div class="ingroups"><a class="el" href="group__hardware.html">Hardware APIs</a></div></div></div>
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<p>Hardware Interpolator API.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="groups" name="groups"></a>
Modules</h2></td></tr>
<tr class="memitem:group__interp__config"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__interp__config.html">interp_config</a></td></tr>
<tr class="memdesc:group__interp__config"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interpolator configuration. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga4bf868768cfc42e621211d9dea8cc9bf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga4bf868768cfc42e621211d9dea8cc9bf">interp_claim_lane</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane)</td></tr>
<tr class="memdesc:ga4bf868768cfc42e621211d9dea8cc9bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Claim the interpolator lane specified.  <a href="group__hardware__interp.html#ga4bf868768cfc42e621211d9dea8cc9bf">More...</a><br /></td></tr>
<tr class="separator:ga4bf868768cfc42e621211d9dea8cc9bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7da3e2eec0075ae39bf648b6a3b6feb9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga7da3e2eec0075ae39bf648b6a3b6feb9">interp_claim_lane_mask</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane_mask)</td></tr>
<tr class="memdesc:ga7da3e2eec0075ae39bf648b6a3b6feb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Claim the interpolator lanes specified in the mask.  <a href="group__hardware__interp.html#ga7da3e2eec0075ae39bf648b6a3b6feb9">More...</a><br /></td></tr>
<tr class="separator:ga7da3e2eec0075ae39bf648b6a3b6feb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47d82417be5f875a1060384eada84147"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga47d82417be5f875a1060384eada84147">interp_unclaim_lane</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane)</td></tr>
<tr class="memdesc:ga47d82417be5f875a1060384eada84147"><td class="mdescLeft">&#160;</td><td class="mdescRight">Release a previously claimed interpolator lane.  <a href="group__hardware__interp.html#ga47d82417be5f875a1060384eada84147">More...</a><br /></td></tr>
<tr class="separator:ga47d82417be5f875a1060384eada84147"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf5bfa88632de76db56f01e3f22d705e0"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gaf5bfa88632de76db56f01e3f22d705e0">interp_lane_is_claimed</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane)</td></tr>
<tr class="memdesc:gaf5bfa88632de76db56f01e3f22d705e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if an interpolator lane is claimed.  <a href="group__hardware__interp.html#gaf5bfa88632de76db56f01e3f22d705e0">More...</a><br /></td></tr>
<tr class="separator:gaf5bfa88632de76db56f01e3f22d705e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b6dfe0f72bb43788ff10d25d6b17403"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga8b6dfe0f72bb43788ff10d25d6b17403">interp_unclaim_lane_mask</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane_mask)</td></tr>
<tr class="memdesc:ga8b6dfe0f72bb43788ff10d25d6b17403"><td class="mdescLeft">&#160;</td><td class="mdescRight">Release previously claimed interpolator lanes.  <a href="group__hardware__interp.html#ga8b6dfe0f72bb43788ff10d25d6b17403">More...</a><br /></td></tr>
<tr class="separator:ga8b6dfe0f72bb43788ff10d25d6b17403"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga839a103a740e190e7dc1b1313afb11a3"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga839a103a740e190e7dc1b1313afb11a3">interp_set_force_bits</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane, uint bits)</td></tr>
<tr class="memdesc:ga839a103a740e190e7dc1b1313afb11a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Directly set the force bits on a specified lane.  <a href="group__hardware__interp.html#ga839a103a740e190e7dc1b1313afb11a3">More...</a><br /></td></tr>
<tr class="separator:ga839a103a740e190e7dc1b1313afb11a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga87a06576cf02918ed74f15415b1517f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga87a06576cf02918ed74f15415b1517f2">interp_save</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, <a class="el" href="structinterp__hw__save__t.html">interp_hw_save_t</a> *saver)</td></tr>
<tr class="memdesc:ga87a06576cf02918ed74f15415b1517f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Save the specified interpolator state.  <a href="group__hardware__interp.html#ga87a06576cf02918ed74f15415b1517f2">More...</a><br /></td></tr>
<tr class="separator:ga87a06576cf02918ed74f15415b1517f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga35e7824263e623c7e2d54a74b2631c61"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga35e7824263e623c7e2d54a74b2631c61">interp_restore</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, <a class="el" href="structinterp__hw__save__t.html">interp_hw_save_t</a> *saver)</td></tr>
<tr class="memdesc:ga35e7824263e623c7e2d54a74b2631c61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Restore an interpolator state.  <a href="group__hardware__interp.html#ga35e7824263e623c7e2d54a74b2631c61">More...</a><br /></td></tr>
<tr class="separator:ga35e7824263e623c7e2d54a74b2631c61"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa213d0a845f57c719593fa8be01482f1"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gaa213d0a845f57c719593fa8be01482f1">interp_set_base</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane, uint32_t val)</td></tr>
<tr class="memdesc:gaa213d0a845f57c719593fa8be01482f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the interpolator base register by lane.  <a href="group__hardware__interp.html#gaa213d0a845f57c719593fa8be01482f1">More...</a><br /></td></tr>
<tr class="separator:gaa213d0a845f57c719593fa8be01482f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1d89466df907cb1515b639813ee34837"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga1d89466df907cb1515b639813ee34837">interp_get_base</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane)</td></tr>
<tr class="memdesc:ga1d89466df907cb1515b639813ee34837"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the content of interpolator base register by lane.  <a href="group__hardware__interp.html#ga1d89466df907cb1515b639813ee34837">More...</a><br /></td></tr>
<tr class="separator:ga1d89466df907cb1515b639813ee34837"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25479c3fa9137c52fc22c1c9a796ab93"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga25479c3fa9137c52fc22c1c9a796ab93">interp_set_base_both</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint32_t val)</td></tr>
<tr class="memdesc:ga25479c3fa9137c52fc22c1c9a796ab93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the interpolator base registers simultaneously.  <a href="group__hardware__interp.html#ga25479c3fa9137c52fc22c1c9a796ab93">More...</a><br /></td></tr>
<tr class="separator:ga25479c3fa9137c52fc22c1c9a796ab93"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae544ffb8c39587a43e69e3644f6da5d2"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gae544ffb8c39587a43e69e3644f6da5d2">interp_set_accumulator</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane, uint32_t val)</td></tr>
<tr class="memdesc:gae544ffb8c39587a43e69e3644f6da5d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the interpolator accumulator register by lane.  <a href="group__hardware__interp.html#gae544ffb8c39587a43e69e3644f6da5d2">More...</a><br /></td></tr>
<tr class="separator:gae544ffb8c39587a43e69e3644f6da5d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaae77d8dbe417020c1d707b05b6a164ae"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gaae77d8dbe417020c1d707b05b6a164ae">interp_get_accumulator</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane)</td></tr>
<tr class="memdesc:gaae77d8dbe417020c1d707b05b6a164ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the content of the interpolator accumulator register by lane.  <a href="group__hardware__interp.html#gaae77d8dbe417020c1d707b05b6a164ae">More...</a><br /></td></tr>
<tr class="separator:gaae77d8dbe417020c1d707b05b6a164ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf831284340273ce3eb6b11974424dc1b"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gaf831284340273ce3eb6b11974424dc1b">interp_pop_lane_result</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane)</td></tr>
<tr class="memdesc:gaf831284340273ce3eb6b11974424dc1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read lane result, and write lane results to both accumulators to update the interpolator.  <a href="group__hardware__interp.html#gaf831284340273ce3eb6b11974424dc1b">More...</a><br /></td></tr>
<tr class="separator:gaf831284340273ce3eb6b11974424dc1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc04844f6c02d3f942f8ee95fca144ef"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gafc04844f6c02d3f942f8ee95fca144ef">interp_peek_lane_result</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane)</td></tr>
<tr class="memdesc:gafc04844f6c02d3f942f8ee95fca144ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read lane result.  <a href="group__hardware__interp.html#gafc04844f6c02d3f942f8ee95fca144ef">More...</a><br /></td></tr>
<tr class="separator:gafc04844f6c02d3f942f8ee95fca144ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab438b641a65e536f3bcec411596988a2"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gab438b641a65e536f3bcec411596988a2">interp_pop_full_result</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp)</td></tr>
<tr class="memdesc:gab438b641a65e536f3bcec411596988a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read lane result, and write lane results to both accumulators to update the interpolator.  <a href="group__hardware__interp.html#gab438b641a65e536f3bcec411596988a2">More...</a><br /></td></tr>
<tr class="separator:gab438b641a65e536f3bcec411596988a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaadc9a108c4c4c0255062b56967c157cc"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gaadc9a108c4c4c0255062b56967c157cc">interp_peek_full_result</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp)</td></tr>
<tr class="memdesc:gaadc9a108c4c4c0255062b56967c157cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read lane result.  <a href="group__hardware__interp.html#gaadc9a108c4c4c0255062b56967c157cc">More...</a><br /></td></tr>
<tr class="separator:gaadc9a108c4c4c0255062b56967c157cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae90bdfe6d73365cf3bed859ca288f928"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#gae90bdfe6d73365cf3bed859ca288f928">interp_add_accumulater</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane, uint32_t val)</td></tr>
<tr class="memdesc:gae90bdfe6d73365cf3bed859ca288f928"><td class="mdescLeft">&#160;</td><td class="mdescRight">Add to accumulator.  <a href="group__hardware__interp.html#gae90bdfe6d73365cf3bed859ca288f928">More...</a><br /></td></tr>
<tr class="separator:gae90bdfe6d73365cf3bed859ca288f928"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga20a0a099084a94e006e68f555685421a"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__interp.html#ga20a0a099084a94e006e68f555685421a">interp_get_raw</a> (<a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *interp, uint lane)</td></tr>
<tr class="memdesc:ga20a0a099084a94e006e68f555685421a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get raw lane value.  <a href="group__hardware__interp.html#ga20a0a099084a94e006e68f555685421a">More...</a><br /></td></tr>
<tr class="separator:ga20a0a099084a94e006e68f555685421a"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<p >Hardware Interpolator API. </p>
<p >Each core is equipped with two interpolators (INTERP0 and INTERP1) which can be used to accelerate tasks by combining certain pre-configured simple operations into a single processor cycle. Intended for cases where the pre-configured operation is repeated a large number of times, this results in code which uses both fewer CPU cycles and fewer CPU registers in the time critical sections of the code.</p>
<p >The interpolators are used heavily to accelerate audio operations within the SDK, but their flexible configuration make it possible to optimise many other tasks such as quantization and dithering, table lookup address generation, affine texture mapping, decompression and linear feedback.</p>
<p >Please refer to the appropriate RP-series microcontroller datasheet for more information on the HW interpolators and how they work. </p>
<h2 class="groupheader">Function Documentation</h2>
<a id="gae90bdfe6d73365cf3bed859ca288f928" name="gae90bdfe6d73365cf3bed859ca288f928"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae90bdfe6d73365cf3bed859ca288f928">&#9670;&nbsp;</a></span>interp_add_accumulater()</h2>

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          <td class="memname">static void interp_add_accumulater </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>val</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Add to accumulator. </p>
<p >Atomically add the specified value to the accumulator on the specified lane</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 </td></tr>
    <tr><td class="paramname">val</td><td>Value to add </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga4bf868768cfc42e621211d9dea8cc9bf">&#9670;&nbsp;</a></span>interp_claim_lane()</h2>

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          <td class="memname">void interp_claim_lane </td>
          <td>(</td>
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          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>&#160;</td>
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<p>Claim the interpolator lane specified. </p>
<p >Use this function to claim exclusive access to the specified interpolator lane.</p>
<p >This function will panic if the lane is already claimed.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator on which to claim a lane. interp0 or interp1 </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga7da3e2eec0075ae39bf648b6a3b6feb9">&#9670;&nbsp;</a></span>interp_claim_lane_mask()</h2>

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          <td class="memname">void interp_claim_lane_mask </td>
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          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane_mask</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>Claim the interpolator lanes specified in the mask. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator on which to claim lanes. interp0 or interp1 </td></tr>
    <tr><td class="paramname">lane_mask</td><td>Bit pattern of lanes to claim (only bits 0 and 1 are valid) </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gaae77d8dbe417020c1d707b05b6a164ae">&#9670;&nbsp;</a></span>interp_get_accumulator()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>&#160;</td>
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<p>Gets the content of the interpolator accumulator register by lane. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current content of the register </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga1d89466df907cb1515b639813ee34837">&#9670;&nbsp;</a></span>interp_get_base()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>&#160;</td>
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<p>Gets the content of interpolator base register by lane. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 or 2 </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current content of the lane base register </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga20a0a099084a94e006e68f555685421a">&#9670;&nbsp;</a></span>interp_get_raw()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>&#160;</td>
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<p>Get raw lane value. </p>
<p >Returns the raw shift and mask value from the specified lane, BASE0 is NOT added</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The raw shift/mask value </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gaf5bfa88632de76db56f01e3f22d705e0">&#9670;&nbsp;</a></span>interp_lane_is_claimed()</h2>

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          <td class="memname">bool interp_lane_is_claimed </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
        </tr>
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          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>Determine if an interpolator lane is claimed. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator whose lane to check </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>true if claimed, false otherwise </dd></dl>
<dl class="section see"><dt>See also</dt><dd><a class="el" href="group__hardware__interp.html#ga4bf868768cfc42e621211d9dea8cc9bf" title="Claim the interpolator lane specified.">interp_claim_lane</a> </dd>
<dd>
<a class="el" href="group__hardware__interp.html#ga7da3e2eec0075ae39bf648b6a3b6feb9" title="Claim the interpolator lanes specified in the mask.">interp_claim_lane_mask</a> </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gaadc9a108c4c4c0255062b56967c157cc">&#9670;&nbsp;</a></span>interp_peek_full_result()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em></td><td>)</td>
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<p>Read lane result. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The content of the FULL register </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gafc04844f6c02d3f942f8ee95fca144ef">&#9670;&nbsp;</a></span>interp_peek_lane_result()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
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<p>Read lane result. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The content of the lane result register </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gab438b641a65e536f3bcec411596988a2">&#9670;&nbsp;</a></span>interp_pop_full_result()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em></td><td>)</td>
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<p>Read lane result, and write lane results to both accumulators to update the interpolator. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The content of the FULL register </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gaf831284340273ce3eb6b11974424dc1b">&#9670;&nbsp;</a></span>interp_pop_lane_result()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Read lane result, and write lane results to both accumulators to update the interpolator. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The content of the lane result register </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga35e7824263e623c7e2d54a74b2631c61">&#9670;&nbsp;</a></span>interp_restore()</h2>

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          <td class="memname">void interp_restore </td>
          <td>(</td>
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          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramtype"><a class="el" href="structinterp__hw__save__t.html">interp_hw_save_t</a> *&#160;</td>
          <td class="paramname"><em>saver</em>&#160;</td>
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<p>Restore an interpolator state. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">saver</td><td>Pointer to save structure to reapply to the specified interpolator </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga87a06576cf02918ed74f15415b1517f2">&#9670;&nbsp;</a></span>interp_save()</h2>

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          <td>(</td>
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          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramtype"><a class="el" href="structinterp__hw__save__t.html">interp_hw_save_t</a> *&#160;</td>
          <td class="paramname"><em>saver</em>&#160;</td>
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<p>Save the specified interpolator state. </p>
<p >Can be used to save state if you need an interpolator for another purpose, state can then be recovered afterwards and continue from that point</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">saver</td><td>Pointer to the save structure to fill in </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gae544ffb8c39587a43e69e3644f6da5d2">&#9670;&nbsp;</a></span>interp_set_accumulator()</h2>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>val</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
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<p>Sets the interpolator accumulator register by lane. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 </td></tr>
    <tr><td class="paramname">val</td><td>The value to apply to the register </td></tr>
  </table>
  </dd>
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<h2 class="memtitle"><span class="permalink"><a href="#gaa213d0a845f57c719593fa8be01482f1">&#9670;&nbsp;</a></span>interp_set_base()</h2>

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          <td class="memname">static void interp_set_base </td>
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          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramtype">uint32_t&#160;</td>
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<p>Sets the interpolator base register by lane. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 or 2 </td></tr>
    <tr><td class="paramname">val</td><td>The value to apply to the register </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga25479c3fa9137c52fc22c1c9a796ab93">&#9670;&nbsp;</a></span>interp_set_base_both()</h2>

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          <td class="memname">static void interp_set_base_both </td>
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          <td class="paramname"><em>interp</em>, </td>
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<p>Sets the interpolator base registers simultaneously. </p>
<p >The lower 16 bits go to BASE0, upper bits to BASE1 simultaneously. Each half is sign-extended to 32 bits if that lane’s SIGNED flag is set.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">val</td><td>The value to apply to the register </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga839a103a740e190e7dc1b1313afb11a3">&#9670;&nbsp;</a></span>interp_set_force_bits()</h2>

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          <td class="memname">static void interp_set_force_bits </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
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          <td class="paramname"><em>lane</em>, </td>
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          <td class="paramtype">uint&#160;</td>
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<p>Directly set the force bits on a specified lane. </p>
<p >These bits are ORed into bits 29:28 of the lane result presented to the processor on the bus. There is no effect on the internal 32-bit datapath.</p>
<p >Useful for using a lane to generate sequence of pointers into flash or SRAM, saving a subsequent OR or add operation.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator instance, interp0 or interp1. </td></tr>
    <tr><td class="paramname">lane</td><td>The lane to set </td></tr>
    <tr><td class="paramname">bits</td><td>The bits to set (bits 0 and 1, value range 0-3) </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga47d82417be5f875a1060384eada84147">&#9670;&nbsp;</a></span>interp_unclaim_lane()</h2>

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          <td class="memname">void interp_unclaim_lane </td>
          <td>(</td>
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          <td class="paramname"><em>interp</em>, </td>
        </tr>
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          <td class="paramname"><em>lane</em>&#160;</td>
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<p>Release a previously claimed interpolator lane. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator on which to release a lane. interp0 or interp1 </td></tr>
    <tr><td class="paramname">lane</td><td>The lane number, 0 or 1 </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga8b6dfe0f72bb43788ff10d25d6b17403">&#9670;&nbsp;</a></span>interp_unclaim_lane_mask()</h2>

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          <td class="memname">void interp_unclaim_lane_mask </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="structinterp__hw__t.html">interp_hw_t</a> *&#160;</td>
          <td class="paramname"><em>interp</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>lane_mask</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>Release previously claimed interpolator lanes. </p>
<dl class="section see"><dt>See also</dt><dd><a class="el" href="group__hardware__interp.html#ga7da3e2eec0075ae39bf648b6a3b6feb9" title="Claim the interpolator lanes specified in the mask.">interp_claim_lane_mask</a></dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">interp</td><td>Interpolator on which to release lanes. interp0 or interp1 </td></tr>
    <tr><td class="paramname">lane_mask</td><td>Bit pattern of lanes to unclaim (only bits 0 and 1 are valid) </td></tr>
  </table>
  </dd>
</dl>

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